Multiplier

• A Novel Approach to Design 2-bit Binary Arithmetic Logic Unit (ALU) Circuit Using Optimized 8:1 Multiplexer with Reversible logic

  Vandana Shukla, O. P. Singh, G. R. Mishra, R. K. Tiwari

  2015｜ Vol. 11 (2) ｜ Open Call Articles｜ Pages: 104-110｜ PDF (1.25 MiB) ｜ 2015-06-23 ｜16 views｜ 0 CrossRef citations

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